HDI PCB Technology: Stages, Stackups and Design Rules

HDI PCB technology describes an interconnection method, not a layer count. Three structural ideas separate an HDI board from a standard multilayer board: microvias drilled by laser instead of mechanically, build-up layers added by sequential lamination instead of one press cycle, and a routing density that lets a given net count fit into fewer or thinner layers than a through-hole design would need.

The practical effect is that a 6-layer HDI board can route what a 10-layer through-hole board routes, and can do it inside a 0.8 mm enclosure. That is why the format dominates smartphones, wearables, automotive camera and display modules, and any product where the mechanical envelope is fixed before the electrical design is finished.

These are the capability limits we hold on HDI builds. The sample column matters on prototypes, where the design is still being proven; the production column is what we can hold on a repeat order.

Two numbers in that table do most of the work. The blind via aspect ratio of 1:1 means a microvia may be as deep as it is wide, so a 0.10 mm via can only cross a dielectric around 0.10 mm thick. And the layer-to-layer alignment of 3 mil is the tolerance that decides how small a capture pad can be before registration starts eating the annular ring. If you are still weighing whether your design needs build-up layers at all, the stage comparison in our guide to 1-stage, 2-stage and 3-stage HDI works through that trade-off first.

A stage is one build-up lamination cycle on one side of the core, so a stackup written as i+N+i has i build-up layers above and below an N-layer core. A 1-stage board has one build-up layer per side, a 2-stage board has two, and any-layer means every adjacent layer pair is connected by microvias instead of only the outer pairs. The stage count is therefore a statement about how many times the panel is laminated, drilled and plated after the core is made, and every one of those cycles is a separate yield event.

These are the build-ups in current production, with a shipped example of each. The last column links to the actual board, which is the fastest way to compare a stackup against a design already running.

Inside a stage, the second-level microvia can land in one of two ways. In a staggered build, the second-stage via is offset and lands on its own pad on the first inner layer, which is easier to plate but spends routing space. In a stacked build, the second-stage via lands directly on top of the first, which saves space and is what makes 2-stage HDI worth its extra cycles, but it requires the first-stage via to be filled and planarised so the second laser drill does not open a void. Stacked vias are the reason filled via-in-pad, not the stage count, is often the real cost step in a 2-stage design.

The manufacturing side of HDI PCB technology is not a single lamination. The board starts as a conventional core, which is imaged, drilled and plated like any multilayer panel, and then build-up material is added one stage at a time. The sequence below is the production route for a 2-stage build.

Two details in that sequence decide quality more than the process list suggests. First, the microvia fill has to be flat: any residual dimple becomes a void when the next layer is pressed over it, and a void under a second-stage via is not repairable after lamination. Second, the laser and mechanical drill programs must not share a queue. We run laser microvia drilling and mechanical drilling on separate dedicated lines, so an HDI panel does not wait behind standard through-hole work, and the drill specialists on each line only run one class of feature. That separation is not a scheduling nicety, it is what keeps a 0.10 mm via reproducible across a production lot.

Because the core is finished before the build-up starts, everything that happens in the core has to be right the first time. A buried via defect found after two build-up cycles means scrapping the whole panel rather than the core, which is why our CAM review treats core drilling and registration as the first checkpoint on an HDI job.

Microvias are formed with CO2 laser drilling rather than a mechanical spindle, down to 0.10 mm in production and 0.076 mm on samples. What limits the geometry is not the laser spot but the aspect ratio: with a 1:1 blind via aspect ratio in production, a 0.10 mm microvia can only cross a dielectric roughly 0.10 mm thick. If your stackup needs a thicker build-up dielectric for impedance or mechanical reasons, the microvia has to grow with it, and the escape routing you were trying to gain is partly given back.

Via-in-pad with conductive fill is the structure most often confused with HDI itself. It is a distinct process step: the via is filled, plated over and planarised so the BGA pad can be placed directly over it. It is what allows a 0.4 mm pitch array to escape without dog-bone fanout, and it is also one of the more expensive steps in the build, so it belongs under the BGA field rather than across the whole board. Back drilling follows the same logic at the other end of the design: it is a cost step you accept on high-speed channels, not a default finish on every through-hole.

An HDI stackup is where the electrical and the mechanical requirements are forced to agree. Impedance is set by the dielectric thickness between the signal layer and its reference plane, but that same thickness is limited by the aspect ratio of the microvia that has to cross it. Copper balance decides whether the panel presses flat, and registration decides how small the capture pads can be. These are the items we check before a design goes to production, and the values we hold.

This stackup review is where HDI PCB technology is applied as a service rather than as an order step. CAM engineers read the layer stack, the dielectric selection and the copper balances, then return an optimised proposal with simulated impedance values before production begins. Front-loading the stackup review is what keeps a project from being redesigned after the first article, when the tooling has already been paid for. The same review covers controlled impedance, where we hold plus or minus 8% in production and plus or minus 5% on samples, verified by TDR testing on every panel, for 50 ohm single-ended and 90 or 100 ohm differential structures.

HDI PCB technology costs more than a through-hole multilayer board because each lamination cycle is a separate yield event, and because the fill, planarisation and microsection verification that make stacked vias reliable are real process steps. The useful way to read the table below is not as a price list but as a ranking of design decisions: the top two rows dominate everything else.

The honest summary is that HDI is worth its cost when it removes something: mechanical drill steps, layers, or board area. A 2-stage build that replaces a 12-layer through-hole stackup with an 8-layer HDI stackup is usually the cheaper board, not the more expensive one, once assembly yield and thickness are counted. HDI becomes expensive when it is used for density the product does not actually need, which is why we push the stage question back to the design team before quoting.

The decision is driven by the smallest feature the design has to escape, not by the layer count. If the finest ball pitch is 0.5 mm and there is room for a through-hole between the pads, a standard multilayer board is the cheaper answer and will have fewer process risks. HDI earns its place when the pitch drops below that, when the enclosure thickness is fixed, or when the layer count needed for a through-hole escape would push the board past the mechanical budget.

Our process capability page lists both routes side by side, including the mechanical layers and the HDI PCB category where the current builds are collected. If the design sits on the boundary, send the Gerber data and the target pitch and we will quote both options rather than assume the denser one.

Build-up layers are thin, so the laminate has to survive repeated press cycles without losing dimensional stability, and the surface finish has to sit on pads as small as 0.20 mm without bridging. We process FR-4 from Tg 130 to Tg 180, higher Tg grades such as IT-180A and S1000-2, low-loss materials including Megtron 6 and 7 and Tachyon 100G, Rogers RO4000 and RO3000 series laminates, and flexible polyimide. Material selection across that range covers applications from DC to 100 GHz.

For most HDI digital products the laminate choice is a thermal question, not an RF one: the number of lamination cycles a material can take matters more than its loss tangent. Where the board also carries a high-speed or RF channel, the dielectric decision moves to the loss budget, and the stackup may end up mixed, with a low-loss build-up over a conventional FR-4 core. Our PCB materials and laminates guide covers the selection criteria and the specific grades in more detail, and the Rogers high-frequency build shows a worked example with measured Dk and Df values.

Finishes available on HDI builds are ENIG, ENEPIG, OSP, HASL and lead-free HASL, immersion silver, immersion tin, and hard gold for edge contacts, with ENIG plus OSP as a combined option. For fine-pitch assembly ENIG or ENEPIG is the usual answer because the flat pad preserves coplanarity, while OSP suits high-volume reflow where the shelf life is managed. Hard gold is specified for gold-finger and press-fit interfaces rather than for solderable pads.

Every production batch passes 100% electrical test, AOI, X-ray inspection and TDR impedance verification. Beyond the electrical checks, microsection analysis confirms plating thickness and layer alignment on every lot, solderability testing validates the surface finish, and a documentation package with lot traceability ships with each order. On a build-up board the microsection is not a sampling formality: it is the only way to see whether a microvia filled completely and whether the dielectric opened during the multiple press cycles.

Production follows IPC-A-600 Class 2 as standard, with Class 3 acceptance available for high-reliability programs. Our processes are benchmarked against IPC-6012 for rigid boards and IPC-6018 for microwave boards, and the quality system is certified to ISO 9001:2015 and IATF 16949, with UL 796 recognition and cUL listing for the North American market, and RoHS and REACH compliance.

The applications below all reach for HDI PCB technology for the same reason: the mechanical envelope is fixed before the electrical design is finished, so the routing has to fit the space rather than the other way round. These are the builds currently in production at our Shenzhen plant.

Send the Gerber or ODB++ data together with the stackup drawing, the impedance requirements and the target ball pitch. If the stage is still open, say so and include the enclosure thickness and the net count; the engineering team returns a comparison of the manufacturable options showing what each one does to the build-up and what process risks it carries. That assessment is part of our PCB manufacturing services, and it is done before quotation rather than after the order.

Samples and production run on the same data set, so a prototype stackup is not re-engineered for volume unless the design changes. For standard and compressed schedules, see our PCB lead time page. To see the broader manufacturing picture, the factory display covers the plant and the lines the HDI work runs on.

Send the Gerber data with the target ball pitch, layer count and quantity. The engineering team returns a per-stage assessment showing which HDI build is manufacturable, what each option does to the build-up and what process risk it carries, so the stage decision is made on data rather than on a default.

Data goes to szpcb@season-pcb.com, or through the contact page if you prefer a form. For an indicative starting point without waiting for a reply, the online quote page will take a first pass at pricing the stackup you describe.